Nvidia is evaluating lower-spec HBM configurations for its Rubin Ultra GPU as a DRAM shortage through 2027 and HBM4e validation delays force memory cutbacks.
Nvidia is evaluating lower-spec HBM configurations for its Rubin Ultra GPU as a DRAM shortage through 2027 and HBM4e validation delays force memory cutbacks.

Nvidia has begun evaluating lower-capacity HBM configurations for its Rubin Ultra GPU, weighing 8-Hi HBM4e and HBM4 alternatives against the 12-Hi HBM4e baseline, as DRAM supply stays tight through 2027.
"The final specification has yet to be determined," TrendForce said in its latest memory industry research.
Since early Q3 2026, Nvidia has expanded its evaluation beyond the 12-Hi HBM4e baseline to include 8-Hi HBM4e, 12-Hi HBM4, and 8-Hi HBM4 designs. Several cloud service providers are also weighing lower HBM capacities for next-generation in-house AI ASICs.
Whether HBM4e completes validation and enters mass production on schedule will determine whether Rubin Ultra's I/O speed rises to 14-16 Gbps from the prior Rubin's 8-11.7 Gbps, or settles at 11-12 Gbps through HBM4 design optimization.
The shift reflects two supply-side bottlenecks. First, the overall DRAM shortage expected in 2027 will limit the wafer capacity that memory suppliers can allocate to HBM production. Second, uncertainty persists over the validation schedule and production yield ramp-up for 12-Hi HBM4e.
Nvidia maintained 12-Hi HBM4e as the baseline design for Rubin Ultra from 2025 through the first half of 2026. TrendForce notes that Nvidia's primary objective for the Rubin Ultra generation is to increase I/O speed, while expanding GPU shipment volume remains a secondary priority. If Nvidia ultimately scales back its HBM specifications, it is expected to do so by reducing the number of DRAM stack layers.
Memory cutbacks ripple across the AI supply chain
The memory shortage has already forced several adjustments to AI chip specifications. Cloud service providers and server OEMs reduced RDIMM capacities for server configurations during the first half of 2026. More recently, Nvidia decided to halve the SOCAMM capacity of its next-generation Vera Rubin Superchip modules after determining that LPDDR5X supply constraints are likely to continue through 2027.
Within a given generation, the number of DRAM stack layers determines the trade-off between HBM capacity per GPU and the number of GPUs that can be shipped. TrendForce believes the final configuration will also depend on wafer allocation decisions made by memory suppliers such as Samsung Electronics, SK Hynix, and Micron Technology.
HBM pricing power stays with suppliers through 2027
From a supply-demand perspective, HBM bit shipments are projected to grow 50-60 percent year over year in 2027, which will still be insufficient to keep pace with demand growth. TrendForce expects HBM suppliers to retain pricing power throughout 2027 under these supply-constrained conditions, with significant increases in HBM pricing already widely anticipated across the industry. DRAM contract prices are expected to rise 13-18 percent in Q3.
AI chip vendors will therefore face the dual challenge of limited HBM supply and higher procurement costs, increasing the incentive to adopt lower-capacity HBM configurations. The memory crunch also extends beyond HBM: China's ChangXin Memory Technologies is advancing its LPDDR6 development, while Taiwanese memory makers Nanya Technology and Winbond are benefiting from order-transfer opportunities created by the HBM crowding-out effect.
For investors, the question is whether Nvidia prioritizes GPU shipment volume over per-chip memory capacity. A reduced HBM configuration caps Rubin Ultra's I/O speed gains at 11-12 Gbps rather than the 14-16 Gbps HBM4e would deliver, while the supply constraints strengthen pricing power for Samsung, SK Hynix, and Micron through 2027 and raise procurement costs for AI chipmakers.
This article is for informational purposes only and does not constitute investment advice.