HBF spec targets 512GB stacks to ease AI memory bottleneck

The first open standard for High Bandwidth Flash could undercut the HBM oligopoly that Samsung, SK Hynix, and Micron have sold out through 2027.

A consortium led by SK Hynix and SanDisk has published the first specification for High Bandwidth Flash, a NAND-based memory that stacks up to 512GB per module — eight to ten times the capacity of an HBM4 stack — at bandwidth reaching 3.0TB/s, giving AI data centers a cheaper alternative to the high-bandwidth memory that has become the industry's scarcest component.

"You won't have to wait too long," SanDisk's Hsu told SDxCentral in May, describing how publishing through the Open Compute Project let the effort move faster than a conventional standards body.

The spec, released at the Future of Memory and Storage conference, defines two stack configurations (8-high and 16-high NAND dies) and three bandwidth grades from roughly 0.4TB/s to 3.0TB/s. The top grade lands inside the 2.0 to 3.3TB/s band typical of HBM4, while the 512GB ceiling compares with roughly 48GB to 64GB for an HBM4 stack. HBF connects to host processors over UCIe, the open chiplet interconnect standard, letting it attach to GPUs and CPUs from different vendors.

Google and Tenstorrent have joined the consortium, but Nvidia — which dominates the AI accelerator market — is not among the named participants, and neither are Samsung, Micron, or Kioxia. SK Hynix has expanded a strategic partnership with Nvidia covering new memory technology, but there is no official confirmation of HBF involvement. Industry expectations put commercialization between late 2027 and 2028, with volume data center demand arriving closer to 2030.

HBF bets on capacity over raw speed

The pitch, unlike HBM's, focuses on capacity rather than raw speed. A 512GB HBF stack sits against roughly 48GB to 64GB for an HBM4 stack, an eight-to-tenfold capacity advantage, while the top HBF grade's 3.0TB/s matches the 2.0 to 3.3TB/s band typical of HBM4. SanDisk has worked to a public roadmap since August 2025: first samples of the memory itself in the second half of 2026, and samples of the first AI inference devices built with HBF in early 2027. Neither company updated that schedule with this week's announcement.

The same document that announces HBF also unveils SK Hynix's tenth-generation 375-layer 4D NAND, claims a 2.5x improvement in performance per watt, and states that mass production of enterprise SSDs built on it begins early next year. HBF itself gets no date mentioned at all.

The memory race splits three ways

Samsung used the same conference to unveil zHBM, a proprietary approach that stacks memory vertically above the AI chip instead of beside it, cutting the distance data must travel. Samsung said the architecture could deliver about eight times the performance of today's HBM5, pack in more than 10 times the memory density, cut energy use by two-thirds, and reduce thermal resistance by more than half. Micron, meanwhile, is gaining ground through existing DRAM production rather than new architecture, lifting its global DRAM market share to 25 percent in the second quarter of 2026 from 22 percent, closing in on SK Hynix's 26 percent while Samsung held the top spot at 39 percent. Micron shares jumped nearly 6 percent on the news.

Kioxia is absent from the HBF consortium, pursuing a different approach to the same problem. Samsung, SK Hynix, and Micron have already sold out their entire 2027 DRAM and HBM production capacity, with customers receiving only 60 to 70 percent of the volumes they originally requested.

New architecture does not add a single wafer of supply — it only decides who gets more value out of the wafers that already exist. That is the part other coverage of the announcement has mostly missed. Samsung, SK Hynix, and SanDisk are not competing on speed anymore; they are competing to become the default design inside a market that will not grow until new fabs finish construction in 2027 and 2028. Whoever wins that bet locks in pricing power for years. For Nvidia and the hyperscalers relying on these components, the AI race is no longer just about who designs the smartest processors, but who can secure the memory to actually run them.

This article is for informational purposes only and does not constitute investment advice.